Course Outline

 Lecture Notes

 Announcements

 Support Material

 Problem Sets

 Sample-Mid-term Exam

 Sample-Final Exam

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                            Labs and Project

     SystemC Setup Guide on Windows-10 System with Cygwin64, SystemC 2.3.3.
     All the required  files for SystemC setup and SystemC and Other Labs are available at D2L

  1. Lab1 : SystemC Tutorial   (3% Marks) 

                                 SystemC on-line Training and Tutorial

  2. Lab2a : Accelerator based SoC Design using SystemC    (4% Marks)

  3. Lab2b : JPEG Encoder/Decoder SoC Design using SystemC    (4% Marks)

  4. Lab3: DE1-SoC Tutorial       (4% Marks)

      SoC-Labs-3-4-and-Project Support Slides

  5. Lab4: IP Core Interfacing to HPC/FPGA SOC Platform      (5% Marks)
      HPC/FPGA Interconnect Details   

      Lab-4 and SoC-Project Multiplier/MD5 Interface Details

  6.  SoC Project  or NoC Design using SystemC Project (15% Marks)

  7. Supporting Documents
      Quartus II Tutorial
      DE1-SoC Board User Manual

Project Details

  Project Selection 

Select title of the project in week 5 or 6.

• Each project combines three separate components: a written component, a demonstration/presentation component and an oral component.
• All the projects are individual but depending on the extended project selection, and with the consent of the instructor two students can be allowed to undertake a complex project.
• Projects will be evaluated according to the marks (out of 100) as per following schedule.

•    Summary of Project (1 page). Week 6. 5% Marks 
•    Demo of project progress. Week-10 lab session. 10% Marks 
•    Interim project report (4-6 typed pages). Week-10. 15% Marks 
•    Final demonstration, oral and presentation. Weeks-11 and 12 lab sessions. 30% Marks 
•    Final project report. Week 12/13. 40% Marks 

Final report of the project should be of 12-15 pages with the following IEEE like format. 
   1. The report must be typed and have some Figures and/or drawings of your own. 
   2. Avoid Cut and paste of Figures from other papers or manuals. 
   3. A suitable Font (Bookman, Courier, Times New Roman) of size 11 or 11.5 points. 
   4. Single line spacing. 
   5. Pages of letter size with 1.0" top, bottom, left and right margins. 
   6. The report must have the following sections: 
       Introduction, Past Work or Review, Methodology, Design, Experimental Results, 
       Conclusions, References. You can always have some more sections such as Appendix, Code, etc.

Generally, course project is to be carried out individually. Students must provide the detailed specification of the project and other information as part of the project summary. Students can propose their own project or select a project in the general areas of Hardware-Software Co-design of an SoC. Some typical projects are given below. Students need to develop a formal project specification before its design and prototype implementation.

  Some typical Student Proposed Extended Projects can be one of the following.  

1. Study of an MP3 audio compression or MPEG-2 video encoder and propose an SoC solution for it. Then model and implement your solution using SystemC.
2. Study of MPEG video file format and development of an MPEG decoder using A9 and some additional hardware using Cyclone-V FPGA.
3. Study of MP3 audio decoding and propose a SoC solution for an MP3 player. Then implement your SoC solution on DE1-SoC FPGA board.
4. Model and implement a suitable SoC design for a standard JPEG file encoder and decoder covering color images. Cyclone V FPGA based DE1-SoC board can be used as platform for implementation.
5. Design and implement an SoPC suitable for a proposed (by the student)  SoC embedded application. The SoC consist of one or more CPU cores, accelerator, memory, serial interface, parallel interface, etc.
7. Configure a typical SoC embedded system on the DE1-SoC board to implementing a real-time application.

   Please Note:

1. There is 5% per day penalty for late submission of the labs and project reports.
2. All of the required written reports including labs and projects will be assessed not only on their technical or academic merit, but also on the communication skills of the author as exhibited through these reports.