Course Outline (W2024)

ELE404: Electronic Circuits I

Instructor(s)Dr. Fei Yuan [Coordinator]
Office: ENG433
Phone: (416) 979-5000 x 556100
Office Hours: Thur. 2-3 pm via ZOOM
Calendar DescriptionIntroduction to electronics, diodes, linear and non-linear circuit applications. Bipolar junction and field-effect transistors: physical structures and modes of operation. DC analysis of transistor circuits. The CMOS inverter. The transistor as an amplifier and as a switch. Transistor amplifiers: small signal models, biasing of discrete circuits, and single-stage amplifier circuits. Biasing of BJT integrated circuits. Multi-stage and differential amplifiers. Current sources and current mirrors. Important concepts are illustrated with structured lab experiments and through the use of Electronic workbench circuit simulations.
PrerequisitesELE 302 and MTH 312 and PCS 224




Compulsory Text(s):
  1. A.Sedra, K.Smith, T. Carusone, and V. Gaunet, Microelectronic Circuits, 8th edition, Oxford University Press, 2020.
Reference Text(s):
Learning Objectives (Indicators)  

At the end of this course, the successful student will be able to:

  1. Use fundamental knowledge of electric circuits to predict and understand the behavior of electronic circuits and amplifiers. (1c)
  2. Apply engineering techniques and conduct computations to analyze and solve electronic circuit problems. (2b)
  3. Transform functional objectives and requirements defined for an electronic circuit into candidate designs for the circuit. (4b)
  4. Propose, evaluate, and rank the candidate circuit designs. Select the most suitable design from the candidates and understand and practice iterations in the design process. (4c)
  5. Learn to verify and validate experimental results obtained in the labs and relating them to the theoretical nature of the electronic circuits under test, by comparing the experimental results with analysis techniques introduced in the lectures as well as computer simulation results. (5b)

NOTE:Numbers in parentheses refer to the graduate attributes required by the Canadian Engineering Accreditation Board (CEAB).

Course Organization

4.0 hours of lecture per week for 13 weeks
2.0 hours of lab per week for 12 weeks
0.0 hours of tutorial per week for 12 weeks

Teaching Assistants1. Mon
 1) 4-6 pm (sec.16): Bhagawat Adhikari (
 2. Tue
 1) 8-10 am (sec.5): David Wu (
 2) 10-12 noon (sec.3): Anahita Abbasnejad Seresti (
 3) 3-5 pm (sec.17): Anahita Abbasnejad Seresti (
 3. Wed.
 1) 8-10 am (sec.13): Bhagawat Adhikari (
 2) 10-12 noon (sec.12): Bhagawat Adhikari(
 3) 10-12 noon (sec.14): Bhagawat Adhikari(
 4) 4-6 pm (sec.15): Shirin Hosseini (
 4. Thur.
 1) 8-10 am (sec.11): Hanish Ashrafirad (
 2) 10-12 pm (sec.4): Hanish Ashrafirad (
 3) 12-2 pm (sec.8): Md Nooruzzaman (
 4) 2-4 pm (sec.7): Md Nooruzzaman (
 5) 4-6 pm (sec.9): Md Nooruzzaman(
 5. Fri
 1) 8-10 am (sec.2): Mohammadreza Maleki (
 2) 10-12 pm (sec.6): Mohammadreza Maleki (
 3) 12-2 pm (sec.10): Hanieh Ashrafirad (
 4) 2-4 pm (sec.1): Hanieh Ashrafirad (
Course Evaluation
Midterm Exam. 30 %
Final Exam 40 %
Design Project 9 %
Labs (7 labs, 3% each). 21 %
TOTAL:100 %

Note: In order for a student to pass a course, a minimum overall course mark of 50% must be obtained. In addition, for courses that have both "Theory and Laboratory" components, the student must pass the Laboratory and Theory portions separately by achieving a minimum of 50% in the combined Laboratory components and 50% in the combined Theory components. Please refer to the "Course Evaluation" section above for details on the Theory and Laboratory components (if applicable).

Examinations1. Midterm Exam will be a 2-hour closed-book examination during regular lecture time on Feb. 28 (2-4 pm).
 2. Final Exam will be a 3-hour closed-book examination. Only course materials covered AFTER the midterm exam will be tested. The date and time of the final examination will be set by the university.
Other Evaluation InformationNone
Teaching Methods1) Drawboard-PDF tools from Microsoft / in-classroom multimedia teaching facilities will be used for teaching.
 2) Pre-lecture notes in pdf will be distributed to students before lectures via D2L.
 3) Post-lecture notes in pdf containing materials added in lectures will be distributed to students after lectures via D2L.
Other InformationNone

Course Content



Chapters /

Topic, description



Ch.3, Ch.4

Module 1 : Diodes and their applications
 1.1 Intrinsic semiconductors
 1.2 Doped semiconductors
 1.3 Currents in semiconductors
   - Drift current
   - Diffusion current
 1.4 pn junctions
   - Structure of pn junctions
   - Width of pn junctions
   - Current of pn junctions
   - Reverse pn junction breakdown
 1.5 Ideal diodes
 1.6 pn junction diodes
 1.7 Applications of diodes
   - Half-wave rectifiers
   - Full-wave rectifiers
   - Full-wave bridge rectifiers
   - Voltage regulators




Module 2 - Bipolar junction transistors (BJTs)
 2.1 Structure of BJT
 2.2 Symbols of BJT
 2.3 Operation of BJT
   - pn-junctions
   - Cut-off mode
   - Active mode
   - Saturation mode
 2.4 Small-signal equivalent circuit of BJT



Ch.7, Ch.8, Ch.10

Module 3 - BJT voltage amplifiers
 3.1 Load line and maximum signal swing
 3.2 Common-emitter (CE) amplifiers
   - CE amplifiers with a resistor load
   - CE amplifiers with a current-source load
 3.3 Common-base (CB) amplifiers
   - CB amplifiers with a resistor load
   - CB amplifiers with a current-source load
 3.4 Common-collector (CC) amplifiers (emitter followers)
   - Emitter followers with a resistor load
   - Emitter followers with a current-source load
 3.5 Multi-stage amplifiers
 3.6 Current mirrors
 3.7 Design considerations of BJT voltage amplifiers




Module 4 - Metal-oxide-silicon field-effect transistors (MOSFETs)
 4.1 Structure of MOSFET
 4.2 Symbols of MOSFET
 4.3 Operation of MOSFET
   - pn-junctions
   - Cut-off
   - Inversion
   - Triode
   - Pinch-off
   - Saturation
 4.4 Small-signal equivalent circuit of MOSFET



Ch.7, Ch.8, Ch.10

Module 5 - MOSFET voltage amplifiers
 5.1 Load line and maximum signal swing
 5.2 Common-source (CS) amplifiers
   - CS amplifiers with a resistor load
   - CS amplifiers with a current-source load
 5.3 Common-gate (CG) amplifiers
   - CG amplifiers with a resistor load
   - CG amplifiers with a current-source load
 5.4 Common-drain (CD) amplifiers (source followers)
   - CD amplifiers with a resistor load
   - CD amplifiers with a current-source load
 5.5 Multi-stage amplifiers
 5.6 Current mirrors
 5.7 Design considerations of MOSFET voltage amplifiers




Module 6 - Differential MOSFET voltage amplifiers
 6.1 Why differential ?
 6.2 Single-ended signaling versus differential signaling
 6.3 Differential voltage gain
 6.4 Differential-input single-ended-output amplifiers
 6.5 Rejection of supply and ground disturbances
 6.6 Common-mode voltage gain
 6.7 Slew rate
 6.8 Mismatch
 6.9 Common-mode input voltage range
 6.0 Design considerations of differential MOSFET voltage amplifiers

Laboratory(L)/Tutorials(T)/Activity(A) Schedule




1 (1.8-1.12)

No lab

No lab in week 1.

2 (1.15-1.19)

No lab

No lab in week 2.

3 (1.22-1.26)

Lab 1

Diodes. Lab report due: 11:59 pm of Feb. 4. Submit lab report to D2L.

4 (1.29-2.2)

Lab 2

Voltage regulators. Lab report due: 11:59 pm of Feb. 11. Submit lab report to D2L.

5 (2.5-2.9)

Lab 3

Bridge rectifiers. Lab report due: 11:59 pm of Feb. 18. Submit lab report to D2L.

6 (2.12-2.16)

Lab 4

Wave-shaping circuits. Lab report due: 11:59 pm of Mar. 3. Submit lab report to D2L.

7 (2.19-2.23)

Study week

Study week. No labs.

8 (2.28-3.4)

Midterm exam

Midterm exam. (Feb. 28, 2-hr in-person closed-book exam). No lab.

9 (3.4-3.8)

Lab 5

Common-emitter amplifier. Lab report due: 11:59 pm of Mar. 17. Submit lab report to D2L.

10 (3.11-3.15)

Lab 6

Common-base amplifier. Lab report due: 11:59 pm. of Mar. 24. Submit lab report to D2L.

11 (3.18-3.22)

Lab 7

Common-collector amplifier. Lab report due: 11:59 pm of Mar. 31. Submit lab report to D2L.

12 (3.25-3.29)


Design project (simulation only). TA will be available via ZOOM during your scheduled lab session.

13 (4.1-4.5)


Design project (simulation only). TA will be available via ZOOM during your scheduled lab session. Project report due: 11:59 pm of April 7. Submit project report to D2L.

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