TORONTO METROPOLITAN UNIVERSITY

Course Outline (W2024)

COE838: Systems-on-Chip Design

Instructor(s)Dr. Gul Khan [Coordinator]
Office: ENG448
Phone: (416) 979-5000 x 556084
Email: gnkhan@torontomu.ca
Office Hours: 12:00-1:00PM Wednesday
Calendar DescriptionThis course will cover the basics of system-on-chip (SoC) design, hardware-software co- specification, co-synthesis and network-on-chip (NoC) systems. It provides the advance knowledge required for system-on-chip design, multi-core architectures and embedded systems on a chip. Students will also be introduced to the main principles of SoC modeling and design using SystemC. Various soft processor cores such as Nios-II and other IPs will be explored. Interconnection structures such as AMBA, Avalon and IBM Core-connect for SoC design will be covered in detail. Various SoC development tools will be utilized in the labs and projects.
PrerequisitesCOE 718 or ELE 734
Antirequisites

None

Corerequisites

None

Compulsory Text(s):
  1. D.C. Black, J Donovan, B. Bunton, A. Keist, SystemC: From the Ground Up, 2nd Edition, Springer 2010, ISBN 978-0-387-69958-5
  2. Michael J. Flynn, Wayne Luk, Computer System Design: System on Chip, John Wiley and Sons Inc. 2011, ISBN 978-0-470-64336-5 (Not-Compulsory)
Reference Text(s):
  1. M. Wolf, Computer as Components: Principles of Embedded Computing System Design, 3rd or 4th Edition, Morgan Kaufman Publishers 2016, ISBN 978-0-12-805387-4
  2. Some relevant review articles to be identified by the instructor and will be available at the course web page.
Learning Objectives (Indicators)  

At the end of this course, the successful student will be able to:

  1. Interconnect engineering concepts related to soft-processor cores, hardware and software systems to design an SoC for real-world applications. Learn to employ specialized knowledge of subsystems like processor cores and other SoC components to design an embedded SoC. (1c), (1d)
  2. Improve students' capabilities of using the technical knowledge of processor architecture, peripherals, programming, and CAD tools to design application specific SoCs. Solve various challenges of high performance SoC design in multiple stages by employing hardware/software co-design methodologies to test and verify each stage and then integrate different stages into an efficient SoC architecture. (4a), (4c)
  3. Learn and efficient use of different SoC simulation, modeling and prototyping tools including SystemC, QSys and Quartus-II. These tools facilitate co-simulation and co-design of SoCs. (5a)
  4. Demonstrate the main features of the course-project and answer critical and project specific questions during project demo and oral sessions. Write project report by following a standard IEEE like format, where all the lab and project reports are evaluated based on their completeness, English, and citations. (7a), (7b)

NOTE:Numbers in parentheses refer to the graduate attributes required by the Canadian Engineering Accreditation Board (CEAB).

Course Organization

3.0 hours of lecture per week for 13 weeks
1.0 hours of lab per week for 12 weeks
0.0 hours of tutorial per week for 12 weeks

Teaching AssistantsMr. Yoga Suhas Kuruba Manjunath, yoga.kuruba@torontomu.ca
Course Evaluation
Theory
Midterm Exam 25 %
Final Exam 45 %
Laboratory
Labs with formal Reports 20 %
Project 10 %
TOTAL:100 %

Note: In order for a student to pass a course, a minimum overall course mark of 50% must be obtained. In addition, for courses that have both "Theory and Laboratory" components, the student must pass the Laboratory and Theory portions separately by achieving a minimum of 50% in the combined Laboratory components and 50% in the combined Theory components. Please refer to the "Course Evaluation" section above for details on the Theory and Laboratory components (if applicable).


ExaminationsMidterm Exam in Week 6, 65-80 minutes.
 Final Exam, during exam period, 2 hours.
Other Evaluation InformationNone
Other InformationNone

Course Content

Week

Hours

Chapters /
Section

Topic, description

1

3

Introduction to System on Chip (SoC)
 SoC Design Approach


2

3

Introduction to SystemC, SoC Co-specification
 http://www.doulos.com/knowhow/systemc/
 


3

3

SystemC based Modeling and Analysis of SoCs


4

3

Hardware-Software Cosynthesis and Accelerators based Embedded System Design


5

3

Basics of Chips and SoC ICs


6

3

Midterm Exam
 
 SoPC (System on Programmable Chips) and SoC Design


7

3

SoC-Platforms and DE1-SoC Design Methods for SoC Project and Labs
 


8

3

NoC (Network on Chip) and NoC based Interconnection.


9

3

NoC based Interconnection: Regular (Mesh, Torus, Tree, etc.) and Application Specific NoC Topologies.


10

3

On-Chip Interconnection: On-Chip Busses including AMBA, Core-connect, Avalon, etc.


11

3

Soft CPU Cores: ARM-A9, OpenRISC, Leon4, OpenSPARC, etc.


12

3

SoC Verification and UVM


13

3

SoC Application Case Studies (If time permits)
 Catching up and Review


Laboratory(L)/Tutorials(T)/Activity(A) Schedule

Week

L/T/A

Description

2

ENG412

Lab1: SystemC: Introduction and Tutorial.
       http://www.doulos.com/knowhow/systemc/
 

3

ENG412

Lab 2a: SystemC based Accelerator for SoC.
 Lab1 Demo and Submission

4

ENG412

Lab 2b: JPEG Encoder/Decoder SoC Design using SystemC.

5

ENG412

Lab2a and Lab2b Demo and Submission

6

ENG412

Introduction to Course Project
 Lab 3: DE1-SoC Tutorial - Creating SoCs using FPGA and Hard A9 (CPU) Systems.

7

ENG412

Lab4: Designing and Interfacing Custom IP with an FPGA/HPS System.
 Lab3 Completion and Demo

8

ENG412

Lab4 Completion and Demo
 Project Summary and Approach (1-2 pages)

9

ENG412

Project Progress

10

ENG412

Project Progress and Interim Report

11

ENG412

Project Progress

12

ENG412

Project Demo and Completion

13

ENG412

Project Presentation and Final Report

University Policies & Important Information

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Refer to the Departmental FAQ page for furhter information on common questions.

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